Currently, the power amplifier for mobile communication has been implemented using a gallium-arsenide field effect transistor (GaAs FET), gallium-arsenide heterojunction bipolar transistor (GaAs HBT), a laterally diffused metal oxide silicon (LDMOS), or a indium-gallium-phosphide heterojunction bipolar transistor (InGaP HBT). These power amplifiers can achieve the output power (Pout) and the power added efficiency (PAE) for the wireless communication; however, they have some disadvantages in requiring an additional power controller chip, additional output matching circuits, and the like.
To improve these issues, the complementary metal-oxide-semiconductor (CMOS) process has been used to implement the power amplifier, thereby offering a high level integration with power controller circuits and low cost as compared to GaAs and other traditional processes. However, the silicon (Si) substrate used in a traditional CMOS process is conductive, which increases RF loss and severely degrades the performance of passive circuit elements. Accordingly, there is a need for novel CMOS power amplifier designs that include integrated passive devices on highly resistive substrates so that the performance of the passive device is not degraded.